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lsp5503 3a synchronous step down dc/dc converter 1 of 12 rev. 1.8 pin assignment 8 5 6 7 1 2 3 4 ss en comp fb bs in sw top view gnd exposed pad pin description name no. description bs 1 bootstrap. this pin acts as the positive rail for the high-side switch?s gate driver. connect a 0.1uf capacitor between bs and sw. in 2 input supply. bypass this pin to g with a low esr capacitor. see input capacitor in the application information section. sw 3 switch output. connect this pin to the switching end of the inductor. gnd 4 ground. fb 5 feedback input. the voltage at this pin is regulated to 0.925v. connect to the resistor divider between output and ground to set output voltage. comp 6 compensation pin. see stability compen sation in the application information section. en 7 enable input. when higher than 2.5v, this pin turns the ic on. when lower than 1.3v, this pin turns the ic off. output voltage is discharged when the ic is off. this pin should not be left open. ss 8 soft-start control input. ss controls the soft-start period. connect a capacitor from ss to gnd to set the soft-start period. a 0.1f capacitor sets the soft-start period to 15ms. to disable the soft-sta rt feature, leave ss unconnected. typical application distributed power systems networking systems fpga, dsp, asic power supplies green electronics/ appliances notebook computers general description the lsp5503 is a monolithic synchronous buc k regulator. the device integrates 100m ? mosfets that provide 3a continuous load cur-rent over a wide operating input voltage of 4.5v to 27v. current mode control provides fast transient response and cycle-by-cycle cur-rent limit. an adjustable soft-start prevents inrush current at turn on. in shutdown mode, the supply cur-rent drops below 1a. this device, available in an sop8l-ep package, provides a very compact sys tem solution with minimal reliance on external components. features 3a output current wide 4.5v to 27v operating input range integrated 100m ? power mosfet switches output adjustable from 0.925v to 24v up to 96% efficiency programmable soft-start stable with low esr ceramic output capacitors fixed 400khz frequency cycle-by-cycle over current protection input under voltage lockout so p 8 l-ep p ac k age please be aware that an important notice concerning availability, discla imers, and use in critical applications of lsc products is at the end of this document.
lsp5503 3a synchronous step down dc/dc converter 2 of 12 rev. 1.8 absolute maximum ratings parameter value unit in supply voltage -0.3 to 30 v sw voltage -1 to v in + 0.3 v bs voltage v sw ? 0.3 to v sw + 6 v en, fb, comp voltage -0.3 to 6 v continuous sw current internally limited a junction to ambient thermal resistance ( ja ) (test on approximately 3 in 2 copper area 1oz copper fr4 board ) 50 c/w junction to ambient case resistance ( jc ) 10 c/w maximum power dissipation 1.8 w maximum junction temperature 150 c storage temperature -55 to 165 c lead temperature (soldering, 10 sec) 300 c ( note: exceeding these limits may damage the device. exposure to absolute maximum rating conditions for long periods may affect device reliability.) recommended operating conditions symbol parameter min max unit v in input voltage 4.5 27 v t j operating junction te mperature range -20 125 o c electrical characteristics (v in = 12v, t a = 25c unless otherwise specified.) parameter symbol test conditions min. typ. max. unit input operating voltage v in v out = 1.0v, i load = 0a to 3a 4.5 27 v input holdup voltage v out = 1.0v, i load = 0a to 3a 4.5 v feedback voltage v fb 4.5v v in 20v 0.900 0.925 0.950 v feedback overvoltage threshold 1.1 v high-side switch-on resistance 100 m ? low-side switch-on resistance 100 m ? high-side switch leakage ven = 0v, vsw = 0v 9 10 a upper switch current limit 3.5 4.0 a lower switch current limit 0.9 a comp to current limit transconductance g comp 5.2 a/v error amplifier transconductance g ea ? i comp = 10 a 800 a/v error amplifier dc gain a vea 480 v/v switching frequency f sw 350 400 470 khz short circuit switching frequency v fb = 0 150 khz maximum duty cycle d max v fb = 0.8v 90 % minimum on time 220 ns en shutdown threshold voltage ven rising 1.1 1.3 1.5 v en shutdown threshold voltage hys-terisis 200 mv en lockout threshold voltage 2.2 2.5 2.7 v en lockout hysterisis 210 mv supply current in shutdown v en = 0 0.3 3.0 a ic supply current in operation v en = 3v, v fb = 1.0v 1.4 1.5 ma
lsp5503 3a synchronous step down dc/dc converter 3 of 12 rev. 1.8 m1 0.1 $ m2 0.1 $ input uvlo threshold rising uvlo ven rising 3.80 4.05 4.40 v input uvlo threshold hysteresis 210 mv soft-start current vss = 0v 6 a soft-start period css = 0.1f 15 ms thermal shutdown temperature hysteresis = 10c 160 c functional block diagram 6 7 8 5 2 1 3 4 internal regulators fb ss comp en 7v zener 1.1v 0.3v 0.925v 2.5v 1.5v ovp shutdown comparator error amplifier lockout comparator en ok 6ua oscillator 150/400khz ramp clk 1.2v ovp in<4.10v in current comparator current sense amplifier 5v in bs sw gnd s q r q functional description the lsp5503 is a synchronous rectified, cur-rent-mode, step-down regulator. it regulates in-put voltages from 4.5v to 23v down to an out-put voltage as low as 0.925v, and supplies up to 3a of load current. the lsp5503 uses current-mode control to regulate the output voltage. the output voltage is measured at fb through a resistive voltage divider and amplified through the internal trans-conductance error amplifier. the voltage at the comp pin is compared to the switch current measured internally to control the output voltage. the converter uses internal n-channel mosfet switches to step-down the input voltage to the regulated output voltage. since the high side mosfet requires a gate volt age greater than the input voltage, a boost capacitor connected between sw and bs is needed to drive the high si de gate. the boost capacitor is charged from the internal 5v rail when sw is low. when the lsp5503 fb pin exceeds 20% of the nominal re gulation voltage of 0.925v, the over volt-age comparator is tripped and the comp pin and the ss pin are disc harged to gnd, forcing the high-side switch off.
lsp5503 3a synchronous step down dc/dc converter 4 of 12 rev. 1.8 application information output voltage setting figure1. output voltage setting figure 1 shows the connections for setti ng the output voltage. select the prope r ratio of the two feedback resistors rfb1 and rfb2 based on the output voltage. typically, use rfb2 10k ? and determine rfb1 from the following equation: (1) inductor selection the inductor maintains a continuous current to the output load. this inductor current has a ripple that is dependent on the inductance value: higher inductance reduces t he peak-to-peak ripple current. the trade off for high inductance value is the increase in inductor core size and series resistance, and the reduction in current handling capability. in general, select an inductance value l based on the ripple current requirement: ripple outmax sw in out in out k i f v ) v v ( v l ? ? = (2) where v in is the input voltage, v out is the output voltage, f sw is the switching frequency, i outmax is the maximum output current, and k ripple is the ripple factor. typically, choose k ripple = 30% to correspond to the peak-to-peak ripple current being 30% of the maximum output current. with this inductor value, the peak inductor current is i out ? (1 + k ripple / 2). make sure that this peak inductor current is less that the 4a current limit. finally, select the induct or core size so that it does not saturate at 4a. typical inductor values for various output voltages are shown in table 1. v out 1.0v 1.2v 1.5v 1.8v 2.5v 3.3v 5v l 4.7uh 4.7uh 4.7uh 4.7uh 6.8h 6.8h 10h table 1. typical inductor values input capacitor the input capacitor needs to be carefully selected to mainta in sufficiently low ripple at the supply input of the converter. a low esr capacitor is highly recommended. sinc e large current flows in and out of this capacitor during switching, its esr also affects efficiency. the input capacitance needs to be higher than 10 f. the best choice is the ceramic type; however, low esr tantalum or electrolytic types may also be used provided that the rms ripple current rating is higher than 50% of the output current. the input capacitor should be placed close to the in and g pins of the ic, with the shortest traces possible. in the case of tantalum or electrolytic ty pes, they can be further away if a small parallel 0.1 f ceramic capacitor is placed right next to the ic.
lsp5503 3a synchronous step down dc/dc converter 5 of 12 rev. 1.8 output capacitor the output capacitor also needs to have low esr to k eep low output voltage ripple. the output ripple voltage is: esr ripple outmax ripple r k i v = out lc sw f in v 2 ? 8 + (3) where i outmax is the maximum output current, k ripple is the ripple factor, r esr is the esr of the output capacitor, f sw is the switching frequency, l is the inductor value, and c out is the output capacitance. in the case of ceramic output capacitors, r esr is very small and does not contribute to the rippl e. therefore, a lower capacitance value can be used for ceramic capacitors. in the case of tantalum or electrolytic capacitors, the ripple is dominated by r esr multiplied by the ripple current. in that case, the out put capacitor is chosen to have sufficiently low esr. for ceramic output capacitors, typica lly choose a capacitance of about 22 f. for tantalum or electrolytic capacitors, choose a capacitor with less than 50m ? esr. optional schottky diode during the transition between high-side switch and low-side switch, the body diode of the low side power mosfet conducts the inductor current. the forward voltage of this body diode is high. an optional schottky diode may be paralleled between the sw pin and gnd pin to improve overa ll efficiency. table 2 lists example schottky diodes and their manufacturers. v in = 12v lsp 5503 in en fb sw c1 c2 0.1uf c5 47pf c6 10nf r2 10k r3 6.8k comp r4 100k bs c4 2.2nf 2 7 3 5 1 8 6 ss 0.1uf c3 4 22uf /16v 10uh/3a l1 44.2k c7 22uf/16v x2 v out = 5v/3a r1 d1 b130/sk13 (option) gnd stability compensation c comp2 is needed only for high esr output capacitor figure 2. stability compensation
lsp5503 3a synchronous step down dc/dc converter 6 of 12 rev. 1.8 the feedback loop of the ic is stabilized by the components at the comp pin, as shown in figure 2. the dc loop gain of the system is deter mined by the following equation: (4) the dominant pole p1 is due to c comp : comp vea ea 1 p c a 2 g f = (5) the second pole p2 is the output pole: out out out 2 p c v 2 i f = (6) the first zero z1 is due to r comp and c comp : comp comp 1 z c r 2 1 f = (7) and finally, the third pole is due to r comp and c comp2 (if c comp2 is used): 2 comp comp 3 p c r 2 1 f = (8) the following steps should be used to compensate the ic: step1. set the crossover frequency at 1/ 10 of the switching frequency via rcomp: (9) but limit rcomp to 10k ? maximum. step2. set the zero fz1 at 1/4 of the crossover frequency. if rcomp is less than 10k ? , the equation for ccomp is: ) f ( r 10 8 . 1 c comp 5 comp ? = (10) if rcomp is limited to 10k ? , then the actual crossover frequency is 10/ (voutcout). therefore: ) f ( c v 10 2 . 1 c out out 5 comp ? = (11) step3. if the output capacitor?s esr is high enough to cause a zero at lower than 4 times the crossover frequency, an additional compensation capacitor ccomp2 is required. the condition for using ccomp2 is: esrcout r ) ( v 012 . 0 , c 10 1 . 1 min out out 6 ? ? ? ? ? ? ? ? ? ? ? (12) and the proper value for c comp2 is: comp esrcout out 2 comp r r c c = (13)
lsp5503 3a synchronous step down dc/dc converter 7 of 12 rev. 1.8 though c comp2 is unnecessary when the output capacitor ha s sufficiently low esr, a small value c comp2 such as 100pf may improve stability against pcb layout parasitic effects. table 3 shows some calculated result s based on the compensation method above. vout cout rcomp ccomp ccomp2 1.0v 22f ceramic 1.5k ? 10nf 100pf 1.2v 22f ceramic 1.7k ? 10nf 100pf 1.8v 22f ceramic 2.2k ? 6.8nf 100pf 2.5v 22f ceramic 3.6k ? 4.7nf 100pf 3.3v 22f ceramic 4.7k ? 3.3nf 47pf 5v 22f ceramic 6.8k ? 2.2nf 47pf 1.0v 47f sp cap 3.0k ? 6.8nf 470pf 1.2v 47f sp cap 3.6k ? 4.7nf 330pf 1.8v 47f sp cap 5.6k ? 3.3nf 220pf 2.5v 47f sp cap 6.8k ? 2.2nf 200pf 3.3v 47f sp cap 10k ? 2.0nf 150pf 5v 47f sp cap 10k ? 2.2nf 150pf 1.0v 470f/6.3v/30m ? 10k ? 2.2nf 1nf 1.2v 470f/6.3v/30m ? 10k ? 3.3nf 1nf 1.8v 470f/6.3v/30m ? 10k ? 4.7nf 1nf 2.5v 470f/6.3v/30m ? 10k ? 6.8nf 1nf 3.3v 470f/6.3v/30m ? 10k ? 8.2nf 1nf 5v 470f/10v/30m ? 10k ? 10nf 1nf table3. typical compensation for different output voltages and output capacitors v in = 12v v out = 5v/3a lsp5503 in en fb sw gnd c1 c2 0.1 f c5 47pf l1 c6 10nf 44.2k r2 10k r3 6.8k comp r4 100k bs r1 c4 2.2nf 2 7 3 5 1 8 6 ss 0.1 f c3 4 10 h/3a 22 f/16v c7 22 f/16v x2 figure 3 shows a sample lsp5503 application circuit generating 5v/3a output.
lsp5503 3a synchronous step down dc/dc converter 8 of 12 rev. 1.8 figure 4 shows a sample lsp5503 applicat ion circuit generating 1.0v/3a output. v in = 12v v out = 1v/3a lsp5503 in en fb sw gnd c1 c2 0.1 f c5 100 pf l1 c6 10nf 1k r2 12k r3 1.5k comp r4 100k bs r1 c4 10nf 2 7 3 5 1 8 6 ss 0.1 f c3 4 4.7 h/3a 22 f/16v c7 22 f/6.3v x2 figure4. lsp5503 1.0v/3a output application
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lsp5503 3a synchronous step down dc/dc converter 10 of 12 rev. 1.8 ordering information lsp5503 x x x package : se: sop8-ep packing : blank : tube or bulk a : tape & reel temperature grade : c : -20 ~ 85 c marking information
lsp5503 3a synchronous step down dc/dc converter 11 of 12 rev. 1.8 package information dimensions in millimeters dimensions in inches symbol min. nom. max. min. nom. max. a 1.35 1.60 1.75 0.053 0.063 0.069 a1 0.05 0.15 0..002 0.006 a2 1.35 1.45 1.55 0.053 0.057 0.061 b 0.33 0.41 0.51 0.013 0.016 0.020 c 0.19 0.20 0.25 0.0075 0.008 0.010 d 4.70 4.90 5.10 0.185 0.196 0.200 d1 3.202 3.402 0.126 0.134 e 3.80 3.90 4.00 0.148 0.154 0.160 e1 2.313 2.513 0.091 0.099 e 1.27typ. 0.050typ. h 5.80 5.99 6.30 0.228 0.236 0.248 l 0.38 0.71 1.27 0.015 0.028 0.050 0 8 0 8 e h e1 d1 l , view ?a? e b d a2 a a1 7 (4 ? ) 0.015 ? 45 c view ?a? 7 (4 ? )
lsp5503 3a synchronous step down dc/dc converter 12 of 12 rev. 1.8 important notice and disclaimer lsc reserves the right to make changes to this document and its product s and specifications a t any time without notice. customers should obta in and confirm the latest product informatio n and specifications before final design, purchase or use. lsc makes no warranty, representation or guarant ee regarding the suitability of its products fo r any particular purpose, nor does lsc assume any lia bility for application assistance or custome r p roduct design. lsc does not warr ant or accept any liability w ith products which are purchase d or used for any unintended or unauthorized application. n o license is granted by implication or otherwise under any intellectual property rights of lsc. lsc products are not authorized for use as critical components in life support devices or systems withou t express written approval of lsc.

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